Abstract: The error rate or the probability of error is an important parameter in the design of digital communication systems. To get rid of these errors, the error control codes are used. This paper briefs about Field Programmable Gate Array (FPGA) implementation of Bose Chaudhuri Hocquenghem (BCH) code used for error correction in transmission using VHDL. The proposed coding scheme achieves good error-performance and complexity trade-offs as compared to the traditional schemes and is very favourable for implementation. In specific BCH code of block length 15, information bit of 7 and error detection and correction upto2 bits. Simulation is carried out using Xilinx12.1 ISE simulator and verified results for the chosen bits. Finally both encoder and decoder design implemented on Spartan 3 FPGA.

Keywords: Error control, Bose Chaudhuri Hocquenghem code, Error correction, Xilinx.